| 摘要 |
PURPOSE:To shorten the synchronism reset time of a multiframe by shifting a multiframe synchronizing pulse backward by one frame. CONSTITUTION:The multiframe synchronizing pulse 4-2 generated by a multiframe counter circuit 3, and a multiframe bit expressed by the M of data 4-1 inputted from an input terminal 9 are compared by a multiframe synchronism detection circuit 5. When both do not coincide with each other and in addition synchronism protection is off, one frame period clock 4-4 is prohibited by one period portion by the output pulse 4-3 of a NOR circuit 16 to be inputted to an OR 8, and a toothless clock 4-5 is generated. Thus, the multiframe synchronizing pulse 4-2 is shifted backward by one frame. When synchronism is attained after repeating it, the position of the multiframe synchronizing pulse 4-2 is fixed at this state, and the output of out-of-synchronism information 4-6 from a terminal 12 is stopped. |
