发明名称 CONTROL SYSTEM FOR DATA PROCESSOR
摘要 PURPOSE:To avoid the deterioration of the data processing efficiency, by enabling a lower level function module to produce a request after the lapse of a fixed time even when the requests are continuously produced from the higher level function modules. CONSTITUTION:When function modules 2 and 3 have the conflict for acuisition of the using right of a bus 4, the requests are given continuously to the bus 4 from the module 2 since the module has a higher priority order than the module 3. While the module 3 drives a bus using right acquiring signal via a bus using right acquiring line 8 owing to a count-up state of an internal timer when a state where the using right of the bus 4 is not available lasts for a fixed time. As a result, the bus using right of the module 2 is given to the module 3. Thus the module 3 acquires the using right of the bus 4 and transfers a request signal to the bus 4 in the next period.
申请公布号 JPS6466765(A) 申请公布日期 1989.03.13
申请号 JP19870224546 申请日期 1987.09.08
申请人 MITSUBISHI ELECTRIC CORP 发明人 ABE KAORU
分类号 G06F13/362;G06F13/36 主分类号 G06F13/362
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