| 摘要 |
<p>A time-multiplexed switched capacitor circuit in which certain capacitors are shared during local time periods of a global time period to allow the total capacitance of the circuit to be reduced. Corresponding savings in chip area in an integrated circuit implementation and component savings in a discrete implementation may be achieved. The invention is particularly applicable to a multiplexed circuit comprising an array of capacitors including first and second common capacitors and first and second pluralities of capacitors. The capacitors may be switched into and out of the multiplexed circuit during different local time periods. The first common capacitor may be switched into the circuit when any one of the first plurality of capacitors is involved in the operation of the multiplexed circuit thus reducing the size of that one capacitor of the first plurality of capacitors. In a similar fashion, the first and second common capacitors may be switched into the circuit when any one of the second plurality of capacitors is involved in the operation of the multiplexed circuit.</p> |
