| 摘要 |
A high-speed, limited-shift signal processor for quantized weighting of an input signal, which receives the input signal and delays is to provide a plurality of delay outputs and selects a number of the delay outputs to be modified by limited shifting of their place values. The limited-shift signal processor generates at least one weighted value from each delay output, including shifting the digit positions of each selected delay output to shift its place value, and sums each of the place-value-shifted delay outputs to obtain a weighted sum signal of the input signal.
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