发明名称 |
High speed logic circuit having feedback to prevent current in the output stage |
摘要 |
An improved FET capacitance driver logic circuit having an inverter feedback stage 22 connected from output to input of output FET 23 to allow the output FET to have a large capacitance charging current surge followed by a reduced conduction thereafter.
|
申请公布号 |
US4810969(A) |
申请公布日期 |
1989.03.07 |
申请号 |
US19880179794 |
申请日期 |
1988.04.11 |
申请人 |
HONEYWELL INC. |
发明人 |
FULKERSON, DAVID E. |
分类号 |
H03K17/04;H03K19/00;H03K19/017;H03K19/094;H03K19/0952;(IPC1-7):H03K19/017 |
主分类号 |
H03K17/04 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|