| 摘要 |
<p>PURPOSE:To constitute a timer circuit in which a few amount of load is applied on CPU software, by providing a count value setting buffer. CONSTITUTION:A subtractor is constituted of a latch 1, a half adder 2, a transmission gate 3, an inverter 4, and a transmission gate 5, and subtraction is performed by 1 at every input of a pulse to a clock input signal 6. When a count value arrives at O as a result of the subtraction, namely, when the -Co output of the half adder 2 of the most significant bit arrives at O, the output of a latch 12 is inputted to the data of the latch 1, and also, an interruption signal 13 is outputted to a CPU, and the output of a time out flip-flop 14 is inverted. The next count number can be set at the latch 12 even in operation a timer. In such a way, it is possible to reduce the load on the CPU software.</p> |
