| 摘要 |
PURPOSE:To optionally set up the using efficiency of a memory and to transfer data between each bus and a memory at a stabilized rate by previously setting up the number of accesses in each bus corresponding to each of plural processors. CONSTITUTION:At the time of receiving an access request from a section A, an access determining means (arbitor) 11 accepts the access request and informs the requests to an access frequency detecting circuit 12A. A controller 13 allows the section A to access a memory 14 in accordance with the access reception to transfer data. When the circuit 12A counts up the number of memory accesses and the count value reaches the previously set up counting frequency, end signal is outputted to the arbitor 11. When an access request is received from a section B at that time, the access request is received and access to the memory 14 is executed. |
