| 摘要 |
The papillary-line comparative computer lock consists in its essential functional elements of one or more high-resolution sensor fields. Assigned parallel to the latter are interfaces which are configured as A/D converters. Connected thereto is a field (array) of processors which process in parallel and have D/A converters. Triggers are integrated in the gate (associative network). The memory/memories are read-only memory modules (parameter memories) which are configured as a matrix. The sensor field is formed by individual sensors which are structured like the eye of an insect. Each pixel (sensor) is permanently assigned a processor. The interconnecting structure of the processors is entirely of the crossbar type. Individual parameter voltages are built up in each case from the frequency distribution of the binary input pulses. The gate (associative network) is set up by providing that each line from the voltage sensors (D/A converters) intersects each line from the capacitors (storage positions) of the storage matrix. The intersections are formed by switches which open - become conductive - as soon as an equal voltage builds up on them. There is thus global access to the contents in the gate (associative network).
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