| 摘要 |
PURPOSE: To select either one of a 16-bit width bus and a 32-bit width bus as a processor data bus under the control of a nanoprogram by providing a processing system with a processor having two levels of sub-instructions. CONSTITUTION: The processor is driven by two levels of sub-instructions, i.e., microinstructions and nanoinstructions, and the nanoinstructions are an encoded group of control signals for practically driving various function units of the processor. The selected group of nanoinstructions is stored in an integrated circuit chip 22 to be a nanomemory and addressed by respective microinstructions read out from a random access microinstruction memory. Although, the nanomemory 22 can use a data bus for a 32-bit processor, only 16 bits out of the 32 bits may be used for a certain application and selection of 16-bit and 32-bit data routes is programmably executed under the control of a microlevel instruction source. Consequently, a sufficiently extended nanoinstruction group can be used.
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