| 摘要 |
<p>PURPOSE:To simplify a clock margin evaluation test by providing an input output interface and a program controllable clock margin generating means at a communication control clock margin generating device. CONSTITUTION:A clock signal outputted from a time division exchanging switch module 1 is supplied through an input interface 3 to a clock variable part 4, and here, in accordance with the switch operation or a control signal inputted from a program control part 6, a clock margin is set. Simultaneously, at the time of the program control, a displaying signal to display the setting conditions is outputted and displayed from the control part 6 to a monitoring part 7. The output of the clock variable part 4 is supplied through an output interface 5 to a communication control part 8 which is a tested device and a clock margin evaluation test is executed.</p> |
