发明名称 FORMATION OF IMPURITY DIFFUSION LAYER
摘要 PURPOSE:To uniformly form a very shallow high concentration impurity diffusion layer on the inner wall of a groove by a method wherein, after a CVD film which is doped by the use of an organic compound impurity diffusion source such as tetraethoxysilane/trimethyl phosphate and the like, has been uniformly applied to the inner wall surface of a groove, impurities are subjected to solid-phase diffusion from the impurity diffusion source using an arc lamp. CONSTITUTION:After an HTO film 2, to be used for prevention of silicon wafer diffusion and having the inner wall part 1 of very narrow and deep trench of 1.5mum in width and 15mum in depth, has been coated, it is placed in a vacuum furnace. Then, tetraethoxysilane (TEOS) and trimethyl phosphate (TMPO) are introduced into the vacuum furnace, and a phosphorus-added glass (TEOS PSG) film 3 is formed. Then, when light 4 an xenon arc lamp is projected, solid-phase diffusion is generated from the TEOS PSG 3, a very shallow and high concentration impurity diffusion layer 5 of surface concentration of 5X10<19>cm<-3>, junction depth of 0.13mum, can be formed uniformly on the side face and the bottom part of the inner wall part.
申请公布号 JPS6453413(A) 申请公布日期 1989.03.01
申请号 JP19870209147 申请日期 1987.08.25
申请人 FUJI ELECTRIC CO LTD 发明人 AKIMOTO TOSHIHARU
分类号 H01L21/22;C23C16/44;H01L21/225;H01L21/26;H01L21/822;H01L21/8242;H01L27/04;H01L27/10;H01L27/108 主分类号 H01L21/22
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