发明名称 |
Random access memory immune to single event upset using a T-resistor |
摘要 |
In a random access memory cell, a resistance "T" decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell.
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申请公布号 |
US4809226(A) |
申请公布日期 |
1989.02.28 |
申请号 |
US19870113695 |
申请日期 |
1987.10.28 |
申请人 |
THE UNITED STATES OF AMERICA AS REPRESENTED BY THE UNITED STATES DEPARTMENT OF ENERGY |
发明人 |
OCHOA, JR., AGUSTIN |
分类号 |
G11C5/00;G11C11/412;(IPC1-7):G11C11/40 |
主分类号 |
G11C5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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