发明名称 Information processing system having decode, write and read means
摘要 In an information processing system for efficiently allocating a writing of a decoded pixel signal into a display memory to a period other than the period during which a read circuit accesses the display memory for reading out information to a display device for a display, the read circuit indicates to a decode/write circuit producing the decoded pixel signal a period during which the read circuit does not access the display memory, and the decode/write circuit writes the decoded pixel signal into the display memory at a timing at which the display memory is not accessed by the read circuit.
申请公布号 US4809215(A) 申请公布日期 1989.02.28
申请号 US19870002203 申请日期 1987.01.12
申请人 HITACHI, LTD. 发明人 NAKAMURA, KOOZOO;TADAUCHI, MASAHARU;HAMADA, NAGAHARU
分类号 G06F3/14;G06F3/153;G09G1/02;G09G1/16;G09G5/00;G09G5/22;(IPC1-7):G06F3/153 主分类号 G06F3/14
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