发明名称
摘要 <p>PURPOSE:To secure the steady phase variation without having the large-scale circuit but by realizing such circuit constitution in that the 2<m>-types of phase states may be secured by giving the control to the m-units of control lines. CONSTITUTION:The pulse signal supplied to input terminal 201 enters synchronous counter 202 to generate pulses (a)-(d) received the 1/2-, 1/4-, 1/8-, and 1/16- division each at each output step. Here latch circuit 203 which supplies pulse (a) receives the 90 deg.-delay via latch pulse (b), and the output signal of latch circuit 204 which supplies the signal receives the 45 deg.-delay via latch pulse (c). And the output signal of latch circuit 205 receives 22.5 deg.-delay via latch pulse (d) and is then delivered to terminal 210. The above actions are done in the state under which the logic levels are all 0 for control lines CONT. 1-3 of input terminal 209 and the output of each counter step gives conduction to all OR circuits 206-208. Then if the control is given to three control lines of terminal 209 with the control signals, the eight types of phase states can be obtained.</p>
申请公布号 JPS6412414(B2) 申请公布日期 1989.02.28
申请号 JP19790074129 申请日期 1979.06.12
申请人 NIPPON ELECTRIC CO 发明人 TAKASE ICHIRO
分类号 H03K5/135;H03K5/133 主分类号 H03K5/135
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