| 摘要 |
A microcomputer executes a certain system program with a microprocessor according to a certain system clock. The microcomputer includes a watchdog timer circuit provided external to the microcomputer which counts a certain time interval by counting a certain timer clock which is separate from the system clock with a counter for a certain count and, upon completion of the counting, forcibly resets the microprocessor of the microcomputer. The system program of the microprocessor has a step of producing a reset output to the counter before a predetermined time only when the system action is normal. There is provided a timer circuit which counts the system clock of the microcomputer with a certain counter for a certain number of counts, counting a time interval which is slightly longer than the normal period of the timer clock of the watchdog timer circuit, and upon completion of the counting interrupts the microprocessor of the microcomputer. The system program of the microcomputer has a step in which reset output is supplied to the counter of the timer circuit in a repeated manner according to the monitoring result of the timer clock of the watchdog timer so as to respond to either the rise or the fall of the timer clock, and a step in which an abnormal output is produced to the outside in response to the interruption from the timer circuit. Thereby, the operation of the microcomputer and of the watchdog timer can be effectively checked and monitored.
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