发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To realize the high integration of a cell, by providing a means to impress a prescribed voltage selectively on a specific row line. CONSTITUTION:Each serial circuit 10 is constituted of four memory cells 11 connected in series, respectively, and one end of each serial circuit 10 is connected to a bit line 12 consisting of metallic wiring 23, and the other end is connected to an earth line 13 consisting of a N<+>-type area 21A or 21B, and the control gate electrode of each memory cell 11 is connected to the row line 14 consisting of an electrode 25, and also, the erase gate electrode of each memory cell 11 is connected to an erasure line 15. In other words, a high voltage is applied on the row line to which the control gate electrode of a non selected cell is connected at the time of writing and reading out data, and a voltage less than the above voltage is applied on the row line to which the control gate electrode of a selected cell is connected. And when the data is read out, a readout voltage is applied on the bit line, and when the data is written, the voltage corresponding to write data is applied on the bit line. In such a way, since the number of wiring and that of contacts can be reduced, it is possible to realize the high integration of the cell.</p>
申请公布号 JPS6450298(A) 申请公布日期 1989.02.27
申请号 JP19870207536 申请日期 1987.08.21
申请人 TOSHIBA CORP 发明人 MASUOKA FUJIO
分类号 G11C17/00;G11C16/02;G11C16/04 主分类号 G11C17/00
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