发明名称 PLL OSCILLATOR
摘要 PURPOSE:To reduce nearby spurious radiation at lock and to obtain a lock width with a wide frequency by applying band limit to a conversion signal by a filter when lock state is given in a PLL feedback loop. CONSTITUTION:When the loop reaches the lock state, since a control voltage from a phase detection section 20 is made stable to a prescribed value with a prescribed voltage range, an 'L' level lock signal is given to a changeover circuit 26 from a lock detector 25 and a filter 27 is connected between the 2nd amplifier 17 and a frequency divider 18. Thus, a modulation signal from the 2nd mixer 16 is subject to band limit by the filter 27. In this case, the frequency of the spurious signal being a difference between the spurious frequency FS (=123.34MHz) by the 5th order cross modulation product of the 2nd mixer and the 6th harmonic of the reference signal frequency is 10kHz. Since the spurious radiation generated from the 2nd mixer 16 is eliminated by the filter 27, the nearby spurious radiation of the oscillation signal from a VCO 11a is not generated.
申请公布号 JPS6450622(A) 申请公布日期 1989.02.27
申请号 JP19870207897 申请日期 1987.08.21
申请人 ANRITSU CORP 发明人 IMAMURA TAKAYUKI;SAKAI MASAYUKI
分类号 H03L7/107;H03L7/10 主分类号 H03L7/107
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