| 摘要 |
<p>PURPOSE:To reduce the waveform distortion of a fundamental clock signal, and also, to convert a machine cycle of a computer, etc. to a high speed, by providing a clock shaping circuit on each logic circuit for constituting the computer, etc., respectively. CONSTITUTION:Logical integrated circuits LSIA-LSID are provided with four pieces of clock shaping circuits CT1-CT4 and clock distributing circuits CD1-CD4, which are provided in accordance with four phase fundamental clock signals phi1-phi4 supplied from a clock generating part CG. Also, as for the signals phi1-phi4, its duty is set to about 50%, and as for internal clock signals phia1-phia4 or phid1-phid4 formed by the circuits CD1-CD4, its duty is set to about 15%. In such a way, a higher order frequency component of the fundamental clock signal which is transferred through a printed circuit in a mounting board is suppressed, a waveform distortion of the fundamental clock signal caused by the parasitic capacity, etc. of the printed circuit is reduced, and also, the period of the fundamental clock signal and the internal clock signal is shortened and the machine cycle can be converted to a higher speed.</p> |
