发明名称 DECODER CONTROL SYSTEM
摘要 PURPOSE:To change the performance of a receiver by changing basic software, by providing a memory in which new basic software is stored and the memory in which the software current in use is stored. CONSTITUTION:Received new software is stored in a buffer memory 34. A latch circuit 38 latches a basic software switching command signal from a broadcasting station side at the time of receiving a basic software switching command. Interruption is applied on a CPU 36 when a switchable timing signal is set a high level, then, a basic software transfer program 37 is executed. The transfer program resets an AND39, and inspects the content of the new basic software by using an erroneous qualifier, etc. When a satisfactory inspection result can be obtained, the new basic software in the memory 34 is transferred to a working memory 35, and control is delivered to an OOOOH, then, the new basic software is started, When no satisfactory inspection result is obtained, no transferr is performed.
申请公布号 JPS6449446(A) 申请公布日期 1989.02.23
申请号 JP19870205191 申请日期 1987.08.20
申请人 NIPPON HOSO KYOKAI <NHK> 发明人 SAITO MASANORI;NANBA SEIICHI
分类号 G06F9/06;G06F9/445;G06F13/00;G09C1/00;H04H20/00;H04H20/91;H04H60/13;H04H60/23;H04H60/25;H04K1/00;H04L9/10;H04L9/12;H04L9/14;H04N7/167 主分类号 G06F9/06
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