COMPUTER SYSTEM PROVIDING ADDRESS MODIFICATION FOR USE ALSO WITH DMA AND INTERRUPTS

摘要

A computer system (10) includes a computer address modification system (20) that is advantageously coupled in a bus network to selectively translate memory address data in 16K blocks and provide DMA page addresses which may match the 16K memory address blocks. The modification system (20) includes a mapping RAM (112) selectively providing translated addresses to enable addresses in a 16 megabyte extended address space. The modification system (20) also includes a DMA page register (118) storing for each addressable 16K block of data for each DMA channel a page address within the extended address space. An interrupt vector type latch (110) is provided for inhibiting mapping when received system addresses equal the value in the latch (110). The control register (108) stores a translation enable signal and a write enable signal for the mapping RAM (112). The DMA mode register (114) stores translation enable signals for each DMA channel.