发明名称 TIMING SYNCHRONIZATION CIRCUIT FOR MODEM
摘要 PURPOSE:To realize the timing synchronization of reception and transmission by performing phase shift correction, by providing respective means for sampling, the polarity inspection of a sampled value, the deviation discrimination of a phase at a sampling point, the calculation of the maximum range of deviation, the specification of an error range, and the calculation of a phase shift quantity. CONSTITUTION:An A/D converter 10 samples the signal of transmission timing waveform of an amplifier 9 by a frequency of N>3 times the modulation speed of a counter 21 setting a reception timing phase as reference, and a control circuit 20 inspects the polarity of the sample value at each sampling point obtained from the output of a filter part 18 by a converter 19 while the reception timing phase changes by 2pi, and discriminates the phase deviation of a reception timing setting a sampling interval as a unit, and also, calculates respective maximum discrimination error range at the even and odd numbers of N based on the maximum number of the sampling point with the same polarity decided by the N and a sampling interval 2pi/N, and compares the absolute values of the sampled values at two sampling points near the center of a phase range occupied by the same polarity, and specifies a 1/2 range at the lead and lag sides of the maximum discrimination error range as the discrimination error range of the deviation, and calculates and corrects the phase shift quantity of the reception timing phase by increasing or decreasing a phase difference equivalent to the deviation by 1/2 of a specified range, and synchronizes the timing waveform of the transmission and reception.
申请公布号 JPS6449458(A) 申请公布日期 1989.02.23
申请号 JP19870207275 申请日期 1987.08.20
申请人 SANYO ELECTRIC CO LTD 发明人 ABE FUYUKI;OKADA ARIO
分类号 H04L27/22 主分类号 H04L27/22
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