| 发明名称 |
Semiconductor SRAM device. |
| 摘要 |
<p>A semiconductor memory device includes a control circuit (G1) for disabling a bit-line load circuit (1) coupled to a column of memory cells in a static RAM only when a write enable signal (WE) and a column select signal (CD) are applied to the column.</p> |
| 申请公布号 |
EP0303971(A2) |
申请公布日期 |
1989.02.22 |
| 申请号 |
EP19880113070 |
申请日期 |
1988.08.11 |
| 申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
OOTANI, TAKAYUKI |
| 分类号 |
G11C11/418;G11C7/12;G11C11/419;H01L21/8244;H01L27/10;H01L27/11 |
主分类号 |
G11C11/418 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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