| 摘要 |
A new differential amplifier circuit including two current mode logic circuits, each comprising a pair of transistors whose emitters are connected to a common current source. The differential amplifier circuit receives three input signals, with a transistor in both of the current mode logic circuits being controlled by one of the input signals. The collector outputs of the two transistors controlled by a single input signal are connected together, and the collector outputs of the two transistors controlled by the other two input signals are also connected together, in both cases to form summing junctions. The summing junctions are connected to an output buffer to generate a pair of signals constituting differential output signals.
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