发明名称 Method of manufacturing integrated circuit semiconductor device
摘要 A method of manufacturing integrated circuit semiconductor device in which a check pattern of resist film is formed for monitoring a state of an element-forming resist pattern having a narrow interval of 1.0 mu m or less is disclosed. The check pattern is designed such that a plurality of resist stripes are arranged with intervals therebetween. Each of the intervals is of 1.0 mu m or less and the width of the resist stripe is three times or more the interval.
申请公布号 US4806457(A) 申请公布日期 1989.02.21
申请号 US19870036076 申请日期 1987.04.09
申请人 NEC CORPORATION 发明人 YANAGISAWA, MASAYUKI
分类号 H01L21/30;G03F1/14;G03F7/20;H01L21/027;H01L21/306;H01L21/66;H01L23/544;(IPC1-7):G03C5/00 主分类号 H01L21/30
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