发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To evade such a case where a low power consumption state is undesirably released and a malfunction is caused by using a control means that defines the release conditions for the low power consumption state in case the signals of different logical levels are supplied to the two prescribed input terminals. CONSTITUTION:A control circuit 5 defines the release conditions for a low power consumption state in case a 1st external input terminal receiving the reset signal RESET and a 2nd external input terminal receiving the HALT/INT signal are set at different logical levels. As a result, both external input terminals are never changed to the different logical levels at one time by such disturbance as the surge due to the electrostatic induction even in case both input terminals are changed undesirably by said disturbance. Thus it is possible to surely prevent such a case where the low power consumption state is undesirably released by such disturbance that issues a command to a CPU 1 for restarting before a system clock CLK is stabilized.</p>
申请公布号 JPS6446818(A) 申请公布日期 1989.02.21
申请号 JP19870204508 申请日期 1987.08.18
申请人 HITACHI LTD 发明人 IWATA KATSUMI
分类号 G06F1/04;G06F1/00;G06F15/78;H01L21/822;H01L27/04 主分类号 G06F1/04
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