| 摘要 |
PURPOSE:To perform the conversion of a large quantity of data at a high speed, by optionally selecting the combination of converting circuits in accordance with control data to be set in a register and previously set control data at one time even when combined data are to be converted. CONSTITUTION:Data inputted from an MSBLSB non-inversional buffer 1a of a 8-bit data coverting circuit are outputted under the same condition and the inputted data are rearranged in the order from the lowest rank bit to the highest rank bit at an MSBLSB inversional buffer 2a. The higher rank four bits of the outputs of the buffers 1a and 2a are extended to 8-bit data at a higher rank four bit extending buffer 3a and the lower rank four bits are extended to 8-bit data at a lower rank four bit extending buffer 4a. Moreover, the output of the buffer 2a is outputted under the same condition from a no-extending buffer 1b and each buffer 1a, 2a, 1b, 3a, and 4a are controlled by the output of a controlling register 5. Then the combination of converting circuits is optionally selected and setting of controlling data of combined data conversion is performed at once. Thus conversion of a large quantity of data is performed at a high speed. |
