发明名称 MEMORY INTEGRATED CIRCUIT
摘要 PURPOSE:To facilitate a high degree of integration by a method wherein vertical multiple chip composition is applied to chip mounting. CONSTITUTION:A vertical multiple chip is composed of memories 1, 2, i.e., the memories 1, 2 are block constituents of the title memory integrated circuit and in case the chip select 3 is 'L', the memory 1 is to be selected, while in case the chip select 3 is 'H', the memory 2 is to be selected. Through these procedures, the circuit can be easily integrated to a high degree.
申请公布号 JPS6445155(A) 申请公布日期 1989.02.17
申请号 JP19870202929 申请日期 1987.08.13
申请人 NEC CORP;NEC ENG LTD 发明人 NAKAJIMA HIROSHI;KOYAMA UEJI
分类号 H01L21/52;G11C11/401;H01L23/32;H01L25/065;H01L25/07;H01L25/18;H01L27/10 主分类号 H01L21/52
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