| 摘要 |
PURPOSE:To quicken the link monitor response time by limiting a value being the result of detecting a carrier level and holding it not to be an upper limit or over so as to reduce the time when the holding value is attenuated and lower than a threshold value after the carrier input is stopped. CONSTITUTION:A holding value limit circuit 5 is provided, which limits the holding value being the result of detecting the reception level of the carrier so as not to exceed a prescribed upper limit. A holding value limit circuit 5 receives a voltage Vc across a capacitor and a prescribed upper limit voltage Vu and consists of a comparator 52 outputting an H level in case of Vc>Vu and an L level signal in case of Vc<Vu and a constant voltage holding circuit 51 using the H level signal to limit the voltage Vc across the capacitor. Thus, when the level of the sent carrier is high, the voltage Vc across the capacitor exceeds the upper limit voltage Vu and the carrier is stopped at this point of time, then the voltage Vc across the capacitor C is lower than the threshold value Vth, since the voltage Vc across the capacitor is suppressed to a prescribed value, the link monitor response time is quickened. |
