| 摘要 |
<p>PURPOSE:To switch clock source without depending upon a difference in period among clock outputs, by invalidating outputs of all synchronizing circuits in switching and by validating inputs of the synchronizing circuits after stopping the clcoks. CONSTITUTION:A selecting circuit 5-1 connected to switching signal terminals 7-1-7-m specifying the clock output of an optional clock generating source outputs an effective signal to one of outputs 8-1-8-n and ineffective outputs to other outputs. The outputs 8-1-8-n of the selecting circuit 5-1 are connected to gate circuits 2-1-2-n, which receive information from the output of a syncrhonizing circuit connecting with a clock output of a clock generating source other than one selected when the output of the gate circuit is effective and, when one of outputs of the synchronizing circuits is effective, invalidate and output the input of the selecting circuit.</p> |
