| 摘要 |
PURPOSE:To prevent the malfunction at the time of input undershoot, by forming an semiconductor element containing an N-type layer on a P-type semiconductor layer surface, and applying a positive voltage and the ground potential to an N-type semiconductor and a P-type semiconductor layer, respectively. CONSTITUTION:Since an N-type substrate exists under a P-layer 12 on which a device is formed, alpha (grounded base current amplification factor) of a lateral NPN transistor which has the P-layer 12 as a base between the N-layer 13 of an input protecting nMOS element and the N<+> layer 7 of a memory cell nMOS is -10<-6>. On the contrary, alpha of an NPN transistor between the N<+> layer 13, the P-layer 12 and an N-substrate 11 of the input protecting nMOS element is 0.5 and large. Therefore, electron injected into the P<->layer 12 at the time of input under-shoot is almost absorbed by the N-substrate 11 biased by GND-Vcc, so that the malfunction due to current flowing into the memory cell can be avoided. |
