| 摘要 |
PURPOSE:To curtail the number of elements, and to reduce the area by constituting a data cell of P and N channel MOS transistors of one piece each, and also, bringing all the data cells of the same line or the same row address, to a wired OR connection to an output data line. CONSTITUTION:Data cells 771-71n, 721-72n,...,7m1-7mn are constituted of P channel MOS transistors 411a-41na, 421a-42na,...,4m1a-4mna and N channel MOS transistors 411b-41nb, 421b-42nb,...,4m1b-4mnb, of one piece each, respectively, and date of the data cells 771-71n, 721-72n,...,7m1-7mn are set by selecting a drain of the MOS transistor of one of P channel or the N channel, as an output. Also, outputs of all the data cells 771-71n, 721-72n,...,7m1-7mn of the same line or row address are brought to a wired OR connection. In such a way, the number of elements and an area of the data area can be curtailed remarkably. |
