| 摘要 |
PURPOSE:To reduce the skew between complementary outputs by a low power consumption, by bringing each output part to a conduction control by an output of a corresponding fourth CMOS inverter circuit or a fifth CMOS inverter circuit, and obtaining a complementary output against an input signal. CONSTITUTION:A line for generating an output signal, the inverse of phi from an input signal CK is constituted of inverter circuits 21, 23 and an output part 25. That is, the inverter circuit 23 consists of a P channel MOS type transistor (PMOS) P5 and an N channel MOS type transistor (NMOS) N5, inverted by receiving an output of the inverter circuit 21, and provides an output to an output part 25. On the other hand, a line for generating an output signal phifrom the input signal CK is constituted of inverter circuits 29, 31 and 33, NPN type bipolar transistors Q3, Q4 which have been brought to a Darlington connection, and an output part 35, and this inverter circuit 33 consists of a PMOSP12 and an NMOSN12, inverted by receiving the input signal CK, and provides an output to an output part 35. In such a way, the skew between complementary outputs is reduced. |
