发明名称 Logic circuit.
摘要 <p>The present invention provides a logic circuit comprising a current control means (5) including first (P1) and second MOS transistors (P2) for controlling the current to the output circuit (1) and also for controlling the output wave form, in accordance with the input signal (A, B) and the output signal. When the output signal rises from a low level to a high level, a large current is supplied to the output circuit to obtain a steep rise. When the output signal is high level, the current to the output circuit becomes small, and the power consumption is reduced.</p>
申请公布号 EP0302671(A2) 申请公布日期 1989.02.08
申请号 EP19880307022 申请日期 1988.07.29
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 UENO, MASAJI C/O PATENT DIVISION;MASUOKA, HIDEAKI C/O PATENT DIVISION
分类号 H03K17/04;H03K17/66;H03K19/00;H03K19/013;H03K19/017;H03K19/08;H03K19/088 主分类号 H03K17/04
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