发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To realize the passivation of a p-n junction end extremely simply by forming a trench exceeding a p-n junction, exposing the p-n junction end from the surface of the trench and shaping an insulating film coating the p-n junction end onto the surface of the trench. CONSTITUTION:A contact layer 15 with an electrode is formed and a trench 17 is shaped, an insulating film is formed so as to coat the contact layer 15 and the trench 17, and an electrode window is shaped to the insulating film 17. When an exposed section on the outside of a mask is etched by a bromine etchant, etching progresses at an angle of 45 deg. to the orientation (100), thus shaping the V trench 17. The depth of the V trench 17 must reach to an InGaASP active layer 12, and may reach to an InP substrate 20 as shown in the figure. The end face of a p-n junction, through which leakage currents flow, is exposed by forming the trench, thus eliminating the need for the passivation of the edge face of a chip, then utilizing general-purpose processes such as normal wet etching, dry etching, anisotropic etching, etc., for shaping the trench.
申请公布号 JPS6436090(A) 申请公布日期 1989.02.07
申请号 JP19870190304 申请日期 1987.07.31
申请人 FUJITSU LTD 发明人 HIROTA TOSHIYUKI
分类号 H01L33/14;H01L33/20;H01L33/30;H01L33/40;H01L33/44 主分类号 H01L33/14
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