| 摘要 |
An image display apparatus including a display memory which is accessed by a central processing unit for controlling input/output traffic of image information and by an image display device such as CRT in a time division multiplex mode. There are further provided a circuit for detecting a time deviation between a signal (Ac) representing a period during which the central processing unit can access the display memory and a signal (ALE) denoting an initiation of a machine cycle, and a circuit for controlling the wait condition in the central processing unit in accordance with the detected time deviation, so that the access of the central processing unit to the display memory is always synchronized with the access of the image display device to the display unit.
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