发明名称 MERGING PROCESSOR
摘要 PURPOSE:To obtain a simplified and compact control circuit having the high performance by merging plural record trains into a single train where the records are ascendingly or descendingly rearranged. CONSTITUTION:All records of a subject record train are read out and merged together by a sorting circuit 11. When these records are delivered, the next address having the final record of a record of a termination record 22. This record 22 is read out of a buffer memory 12 in the same way and supplied to the circuit 11. Then the merging process is through when the records 22 of three record trains A-C are held by the circuit 11 respectively. Thus the merging process control is simplified and such circuits that hold the positions of the read records included in a record train, various counter circuits, etc., can be omitted. In such a constitution, a compact control circuit having high performance is obtained.
申请公布号 JPS6433628(A) 申请公布日期 1989.02.03
申请号 JP19870191173 申请日期 1987.07.30
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 SATO TETSUJI;TSUDA NOBUO;NAKABAYASHI KIYOSHI;MATSUO HIROSHI
分类号 G06F7/24;G06F7/32 主分类号 G06F7/24
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