发明名称 SEMICONDUCTOR LOGIC CIRCUIT
摘要 PURPOSE:To quicken the falling of an output signal by detecting a transient current caused due to parasitic capacitance of a bipolar transistor(TR) caused at the time of rising and providing a TR falling its output signal in response thereto. CONSTITUTION:A transient current Ipass flowing through a parasitic capacitor CCB at the time of rising and only at transient state is detected by a forward internal resistor of a diode 18 and fed to a TR 19. Thus, the TR 19 is turned on, a current Idis flows to the ground and the potential at an output terminal OUT goes immediately to a low level together with a TR 17 turned on simultaneously. Then an output signal is kept low by the ON-state of a 2nd bipolar TR 17 and the ON-state of the MOS TR 15 with a 2nd MOS gate circuit 21 turned on thereby increasing the falling responsiveness considerably. Thus, the transient current flowing uselessly for the charging/discharging of the CCB of a 1st bipolar TR 16 is utilized effectively to improve the performance of the logic circuit.
申请公布号 JPS6432525(A) 申请公布日期 1989.02.02
申请号 JP19870189322 申请日期 1987.07.28
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 FUKUSHI ISAO;NOMURA SETSU
分类号 H03K17/04;H03K17/56;H03K17/567;H03K19/01;H03K19/08 主分类号 H03K17/04
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