发明名称 CIRCUIT FOR REPRODUCING DIGITAL VTR
摘要 <p>PURPOSE:To transmit data and an error flag through an 8-bit data path and to use an inexpensive reproducing circuit by decoding an error correcting code at every DPCM block, forming the error flag at every DPCM by the decoding, adding this to the DPCM blocks, and transmitting it. CONSTITUTION:Data are recorded onto a magnetic tape at every DPCM block. Reproducing data are supplied to an input terminal 1. A synchronizing signal and an ID signal are decoded by a synchronization.ID decoder 2 and the error correction of error correcting code (internal code) is executed at every block in an internal code decoder 3. The output signal of the internal code decoder 3 is the one that a one byte(B0) error flag and an ID signal are added to the head of the DPCM blocks of 6 bytes (B1-B6) and the output signal is written into a reproducing memory 4. The ID signal is a field ID signal and a frame ID signal. The processing the error correction of an external code is executed by an external code decoder 5 to the data and the error flag read out of the reproducing memory 4. The output signal of the external code decoder 5 is taken out to an output terminal 6.</p>
申请公布号 JPS6432783(A) 申请公布日期 1989.02.02
申请号 JP19870189854 申请日期 1987.07.29
申请人 SONY CORP 发明人 JIEEMUSU HEDORII UIRUKINSON
分类号 H04N5/92;G11B20/18;H04N19/102;H04N19/166;H04N19/423;H04N19/44;H04N19/46;H04N19/50;H04N19/65;H04N19/67;H04N19/70;H04N19/88;H04N19/89;H04N19/895 主分类号 H04N5/92
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