发明名称 DYNAMIC TYPE SEMICONDUCTOR MEMORY DEVICE
摘要 <p>A dynamic type semiconductor memory device having refreshing function includes a clock pulse generating circuit having a row clock pulse generating section which includes a plurality of cascade-connected delay circuits, a plurality of MOS transistors selectively connected between said delay circuits, and a gate control circuit for changing conduction resistances of the MOS transistors according to the level of a refreshing signal.</p>
申请公布号 EP0109069(B1) 申请公布日期 1989.02.01
申请号 EP19830111290 申请日期 1983.11.11
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MIYAWAKI, NAOKAZU;OGURA, MITSUGI
分类号 G11C11/403;G11C11/406;G11C11/407;(IPC1-7):G11C11/24 主分类号 G11C11/403
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