| 摘要 |
<p>A semiconductor memory device according to the invention includes a means (BC) in a memory, arranged in a memory cell (MC) , for applying a voltage to a control gate (CG) of a memory cell (MC) such that a floating gate voltage is higher than a drain voltage by about 3 V or more during read-driving of a floating gate memory cell. According to the semiconductor memory device of the invention, when a drain voltage of a floating gate memory cell (MC) is about 3 V or less, during read-driving, high reliability against soft write can be maintained and high-speed read access (about twice the conventional case) can be performed. The semiconductor integrated circuit can be effectively applied to an EPROM integrated circuit and a memory-mounted device (on-chip memory).</p> |
