发明名称 DIGITAL PHASE SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To obtain a stable multiple signal processing circuit without adjustment by digitizing a phase synchronizing circuit. CONSTITUTION:An analog digital converted input signal (synchronized frequency signal) A is supplied through a latch circuit 11 to a gate circuit 13, the output of the gate circuit 13 is integrated by an integrating circuit 14 and thus, amplitude information of 0 or 1 is obtained. By the amplitude information, the frequency-dividing ratio of a frequency-dividing circuit 7 to frequency-divide a reference signal B is controlled, and by using the output of the frequency- dividing circuit 17, the conducting timing signal of the gate circuit 13 is obtained. Thus, the stability of a phase synchronizing group is obtained, and the phase control with the accuracy finer than the sampling period of the input signal can be obtained.
申请公布号 JPS6430326(A) 申请公布日期 1989.02.01
申请号 JP19870186997 申请日期 1987.07.27
申请人 TOSHIBA CORP;TOSHIBA AUDIO VIDEO ENG CORP 发明人 NAKAMURA SHINICHI;TOYODA NAOHIKO
分类号 H03L7/06 主分类号 H03L7/06
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