发明名称 Process for forming planar wiring using polysilicon to fill gaps
摘要 A semiconductor device having a conductor line free of cracks is produced by forming an insulating layer on a semiconductor substrate, opening a contact hole in the insulating layer, forming a contact electrode comprising a high-melting point metal or a silicide of a high-melting point in the contact hole, filling a gap between the contact electrode and the side of the contact hole with polycrystalline silicon to form a substantially level surface, forming a conductor line on the level surface, and alloying the polycrystalline silicon with the conductor line and/or the contact electrode by heating.
申请公布号 US4801559(A) 申请公布日期 1989.01.31
申请号 US19880165367 申请日期 1988.02.29
申请人 FUJITSU LIMITED 发明人 IMAOKA, KAZUNORI
分类号 H01L21/3205;H01L21/768;H01L23/485;(IPC1-7):H01L21/283 主分类号 H01L21/3205
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