Electronic component package using multi-level lead frames

摘要

Disclosed is a semiconductor package with a high pin count. External contacts to the chip are provided by interdigitated leads formed from an upper and lower lead frame. The lower lead frame includes a paddle for mounting the chip. The upper lead frame initially has its leads tied together and a center portion is punched out to fit the size of the particular chip. The two lead frames are preferably coplanar in the area around the boundaries of the package encapsulant.