| 摘要 |
<p>PURPOSE:To attach high reliability on a function to discriminate correct data, by outputting a bus cycle completion signal to the outside of a microprocessor for debugging setting an internal ready signal outputted by the detection of an external ready signal as a momentum. CONSTITUTION:The titled processor is provided with a detection circuit 1 which detects the external ready signal at the leading or trailing edge of a clock when an enable signal which becomes active only at a timing where the microprocessor for debugging can receive data is active and activates the internal ready signal, a control circuit 2 which generates a signal representing the completion of a bus cycle for a constant time starting from the next clock state setting the activation of the internal ready signal as a momentum, and a terminal which outputs the signal generated by the control circuit 2. In such a way, by adding the bus cycle completion signal on the trace content of a microprocessor development supporting device, it is possible to attach high reliability on the function to discriminate the correct data.</p> |
