| 摘要 |
PURPOSE: To attain the highest efficiency by deciding the mutual connection of processing elements in array by delay control inside a delay element and permitting the processing elements in emulated array to independently execute function. CONSTITUTION: OR gates 31 and 32 supplying a signal to the element 20 and the delay elements 33 and 34 receiving the signal from the element 20 are added in order to realize an architecture having multiplexed singles-processing elements so as to emulate a row and a column. Then, the delay elements are controlled so that the width of emulated array is easily controlled and the number of the emulated rows is extremely easily controlled in the same way. Therefore, the mutual connection of the processing elements in array is decided and the respective processing elements independently execute the optionally selected function apart from the function executed by the adjacent processing elements so that the highest efficiency is attained. |
