INTERRUPTION CONTROL SYSTEM

摘要

PURPOSE:To efficiently transfer an interruption request and interruption information without giving effect on substantial data transfer by providing an interruption exclusive bus in common to each module for input/output device control and a processor. CONSTITUTION:Processor modules PMDL1a-1n and input/output device control modules EMDL2a-2m are connected by a common bus 4 and the EMDL2 and the interruption control module CMDL3 are connected by an interruption bus 5 and the PMDL1 and the CMDL3 are connected by an interruption bus 6. Then the CMDL3 extracts the interruption request caused in each EMDL2 and its interrupt information via the bus 5 by the polling system and registers it in a storage section, and the registered interruption request and information are transferred to the corresponding PMDL1 via the bus 6 by the time division system.