| 摘要 |
PURPOSE:To make it possible to constitute a miniaturized cell structure with a reduced distance between a source contact and a gate electrode, by forming on interlayer insulating film between gate end source electrodes in combination with anisotropic etching and isotropic etching. CONSTITUTION:A method comprises the steps or forming an interlayer insulating film 4 between a gate electrode 3 and a source electrode 9 above the gate electrode, etching the interlayer insulating film and the lower gate electrode 3, and forming the interlayer insulating layer 4 between the gate electrode and 8 source electrode (source contact portion) on the side of the gate electrode. It further comprises the steps of selectively (anisotropic) etching a surface of this interlayer insulating film parallel to a wafer and (isotropic) etching for tapering a source contact hole. As a result, a margin for matching a mask alignment is not required and the interlayer insulating film between the side of the gate electrode and the source contact can be thin by control, which has on effect on miniaturization of a cell structure. |
