| 摘要 |
PURPOSE:To prevent the destruction of an address area in a CPU caused by the malfunction of a peripheral device by providing a channel device between the CPU and the peripheral device so that the number of words of the data transferred are monitored and controlled. CONSTITUTION:The number of addresses of an address area storing data and the maximum number of transfer words are read out of a CPU 20. The former is set at an address counter 5 of a peripheral device 1; while the latter is set at the tarry number counters 6 and 14 of a channel device 2 respectively. Then the data received from a data register 7 of the device 1 are stored in a data register 10 and a register 9 together with the command signal received from a command register 4 and the address signal received from the counter 5. These data and signals are sent to the CPU 20 in the prescribed timing. In this case, the counter 14 is counted down by an amount equal to the number of words of the data to be transferred. Then the occurrence of an error is informed when the count value of the counter 14 is equal to 0. |
