| 摘要 |
PURPOSE:To lessen the area to be required for one bit of a memory without damaging the function of the one bit by a method wherein a memory transistor is arranged on the sidewall part of a normal transistor and is formed integrally with the normal transistor. CONSTITUTION:A very thin oxide film 11 is formed, a memory nitride film 6 is deposited and thereafter, an anisotropic etching is performed to leave the film 6 as the sidewall of a normal transistor. After this, phosphorus ions 20 are implanted. Then, an oxide film 12 is formed to remove only the oxide film on the film 6, a second poly Si 8 is deposited and a second gate poly Si film 8 is formed by a photoengraving technique. After that, the film 12 is etched and N<+> source and drain regions 9b are formed by implanting arsenic ions. As a memory region is formed in close proximity to a channel of the normal transistor, a one-bit cell of a structure, wherein one piece of the normal transistor and one piece of a memory transistor are formed integrally in 1 to 1, can be made small. |
