| 摘要 |
A microprocessor-based apparatus for testing the electrical condition of electronic circuitry, particularly computers, employs a buffer and a latch associated with each of the address bus and the data bus to provide electrical isolation of said buses. In using the apparatus, the integrity of a central testing "kernel" comprising the testing program itself with its testing data in ROM is first verified. The testing program then evaluates, in order, the data bus, the address bus, and then such additional and addressable circuitry as may be connected to said data bus and address bus. Incorporation of analog-to-digital converters permits determination of actual circuit node voltages, in addition to digital levels or the presence of open or short circuits. |
